Abdul Ahmad
Design Verification Engineer
United Kingdom
Summary
👤
Senior🎓
Top SchoolAbdul Ahmad is a Design Verification Engineer with 10 years’ experience specializing in digital design verification using SystemVerilog and UVM, currently driving verification efforts at Apple. His background spans ASIC/FPGA design and verification roles across industry and research, combining solid academic training from NUST and a master’s in embedded systems from TU Kaiserslautern. He brings practical experience tackling complex simulator integration issues—contributing bug fixes and SystemC/TLM improvements to the prominent gem5 project—demonstrating comfort with both RTL verification and system-level modeling. Known for methodical debugging and improving checkpointing, deadlock avoidance, and memory/statistics models, he blends low-level hardware insight with system-aware verification strategies.
11 years of coding experience
6 years of employment as a software developer
Masters in Electrical & Computer Engineering, Embedded Systems, 1.51/1.0, Masters in Electrical & Computer Engineering, Embedded Systems, 1.51/1.0 at Technische Universität KaiserslauternBE, Computer Engineering, 3.55, BE, Computer Engineering, 3.55 at National University of Sciences and Technology (NUST)
German, English, Urdu
Github Skills (9)
simulations10
simulation10
c-language10
architectures10
cprogramming-language10
architecture10
debugging9
modeling7
open-source7
Programming languages (1)
Github contributions (2)
gem5/gem5
Sep 2015 - Jul 2016
The official repository for the gem5 computer-system architecture simulator.
Role in this project:
Backend Developer
Backend DeveloperContributions:7 commits in 9 months
Contributions summary:Abdul primarily focused on bug fixes and improvements related to SystemC and TLM integration within the gem5 simulator. Their contributions addressed issues like simulator crashes due to the handling of specific commands, and deadlock situations involving the terminal and SystemC/TLM simulations. They also worked on adapting checkpointing and DrainManager functionality within SystemC, and improving statistics and memory models.
gem5architecturearmmodelingrisc-v
codverch/Dirty-Block-Index
Sep 2015 - Jul 2016
Implementing the dirty block index (DBI) with aggressive writeback mechanism in gem5.
Contributions:7 commits in 9 months
gem5
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