Artur Tabernacki
CPU Design Verification Engineer
Austin, Texas, United States
Summary
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Senior🎓
Top SchoolArtur Tabernacki is a CPU design verification engineer with 12 years of hands-on experience validating multi-core, multi-level cache processors and complex SoC blocks. He has debugged RTL and UVM testbenches across teams at Samsung and SiFive, owning top-level verification, coverage closure, and nightly regression triage for RISC-V and ARM CPU clusters. At Carde.io he translated product features into scalable onboarding and support workflows, showing an ability to bridge deep technical verification with customer-facing operational leadership. Now at Google, he brings proven expertise in root-causing subtle RTL and stimulus failures and building disciplined test infrastructure that accelerates delivery. Collected experience across vendor and startup environments gives him a pragmatic feel for both rigorous verification methodology and fast feature-driven iteration. He holds a Computer Engineering degree from UIUC and is known for turning elusive corner-case bugs into deterministic, repeatable tests.
12 years of coding experience
8 years of employment as a software developer
University of Illinois Urbana-ChampaignGithub contributions (1)
Yes-OS/yesos
Mar 2014 - May 2014
Contributions:47 commits in 1 month
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