Cheng-yi Lin
Lead, Product Specification Ecosystem & Vendor Integration (DDIMM Focused)
Town of East Fishkill, New York, United States
Summary
👤
Senior🎓
Top SchoolCheng-yi Lin is a product characterization and yield management engineer with nine years of experience at IBM, specializing in data-driven root-cause analysis for 14nm/22nm high-performance server processors. He combines device-physics expertise from UCLA and National Tsing Hua University with hands-on data engineering skills—Python, SAS, SQL, Dash—and has built automated pipelines and visualization tools to accelerate yield improvement. Cheng-yi’s background in TCAD, ADC/FFT implementation, and sensor readout hardware gives him a rare cross-disciplinary view that connects semiconductor process nuances to actionable analytics. At IBM he has driven investigations into eDRAM failure patterns, implemented daily regression analyses via cron-enabled scripts, and coordinated multi-team failure analysis to improve manufacturability. Based in East Fishkill, NY, he brings both lab-level circuit and materials research experience and production-scale data mining to tackle complex semiconductor yield challenges.
9 years of coding experience
8 years of employment as a software developer
University of California, Los AngelesMaster's Degree Electrical and Electronics Engineering, Master's Degree Electrical and Electronics Engineering at National Tsing Hua University
English, Chinese
Github Skills (80)
javascript10
jquery10
popover10
typescript10
dropdown10
tooltip10
frontend10
react10
session-replay9
project-management9
wechat9
feature-flags9
ai9
gpt9
python9
Programming languages (7)
Github contributions (5)
ZZITE/Study-Notes
Jun 2017 - Feb 2022
学习资料，笔记整理
Contributions:99 commits, 97 pushes, 2 branches in 4 years 9 months
javalinux
ZZITE/resume
Oct 2022 - Aug 2024
Contributions:24 pushes, 2 branches in 1 year 10 months
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