Dustin Richmond
Assistant Professor at University of California, Santa Cruz
California, United States
Summary
🤩
Rockstar🎓
Top SchoolDustin Richmond is an Assistant Professor at UC Santa Cruz with 11 years of experience building secure, usable hardware and systems, blending academic research with pragmatic engineering. His work spans computer architecture, reconfigurable systems, and hardware security—focusing on languages, abstractions, and libraries for FPGAs as well as side-channel mitigation and counterfeit detection. He earned a PhD from UC San Diego after industry internships at Xilinx, Altera, and NVIDIA, and helped port and extend the influential PYNQ platform to newer Zynq Ultrascale+ devices. Dustin contributes to low-level, cross-platform drivers and tooling (e.g., PCIe driver work for RIFFA and core PYNQ refactors), demonstrating a knack for making complex programmable hardware more accessible and reliable. Based in California, he combines hands-on embedded systems development with rigorous research, often surfacing practical fixes that improve cross-family FPGA compatibility. Colleagues note his long-running commitment to secure, usable hardware systems dating back to 1989, reflecting deep, sustained domain expertise.
11 years of coding experience
11 years of employment as a software developer
Bachelor of Science (BS), Electrical Engineering, Bachelor of Science (BS), Electrical Engineering at University of WashingtonUniversity of California San Diego
Github Skills (17)
python10
c1110
abstraction-layer10
linux-kernel10
c1710
device-driver10
sys10
fpga10
embedded10
hal10
digital-logic9
windows-driver9
zynq9
pcie9
driver9
Programming languages (14)
Github contributions (5)
KastnerRG/riffa
May 2015 - Sep 2016
The RIFFA development repository
Role in this project:
Back-end Developer
Back-end DeveloperContributions:93 commits, 5 PRs, 50 pushes in 1 year 4 months
Contributions summary:Dustin appears to be involved in the development and maintenance of a Linux-based PCIe driver for a RIFFA device. Their initial commit sets up the foundational structure of the driver, including the core files and initial functionality. Subsequent commits address bugs and improve the Windows driver's stability, suggesting a focus on porting and maintaining the driver across different operating systems, specifically addressing potential data corruption issues.
cpp
Xilinx/PYNQ
Jun 2017 - Aug 2017
Python Productivity for ZYNQ
Role in this project:Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:57 commits, 33 PRs, 23 comments in 2 months
Contributions summary:Dustin refactored and restructured core PYNQ classes related to programmable logic (PL) bitstreams, TCL parsing, and clock configurations to cleanly handle multiple device families, specifically Zynq and Ultrascale. They implemented support for bit-to-bin conversion for the ZCU100 FPGA Manager driver. The user also made significant changes to the `ps.py` and `dma.py` files to improve cross-family compatibility and added debugging capabilities to register classes.
pythonzynqpynq
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