Huang Wenyong
Shanghai, Shanghai, China
Summary
🤩
Rockstar🎓
Top SchoolHuang Wenyong is a seasoned ASIC/FPGA engineer with over 20 years in IC design and verification and seven years of recent hands-on experience, currently based in Shanghai. He has led SoC projects end-to-end—multiple tape-outs—and managed a Video SpeedBridge team at Cadence, integrating high-speed emulation peripherals for Palladium systems. His background spans peripherals, graphics IP, and high-frequency FPGA mapper designs, showing a rare blend of silicon bring-up and system verification. As an open-source contributor to the popular wasm-micro-runtime, he enhanced SGX integration, memory security, and SIMD support—demonstrating practical security and performance-focused systems work beyond traditional hardware roles. Peers describe him as a pragmatic engineering manager who still dives into core technical contributions to solve difficult cross-domain issues.
7 years of coding experience
21 years of employment as a software developer
Bachelor, EE, Bachelor, EE at Fudan University
Github Skills (8)
memory-management10
assembly10
webassembly10
x8610
security9
sgx9
system-calls9
simd8
Programming languages (7)
Github contributions (5)
wenyongh/wabt
Sep 2021 - Jan 2024
The WebAssembly Binary Toolkit
Contributions:2 PRs, 1 push, 2 branches in 2 years 4 months
rustwasmwebassembly
wenyongh/zephyr
Oct 2019 - Jan 2022
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
Contributions:62 PRs, 115 pushes, 4 branches in 2 years 3 months
architecturesscalablegit-repositorysecuresoftware-defined-radio
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