Ilia Sergachev
Zurich, Zurich, Switzerland
Summary
🤩
Rockstar🎓
Top SchoolIlia Sergachev is a researcher-engineer with 11 years of experience building commercial industrial and scientific devices end-to-end, combining analog/digital electronics, optics and embedded computing. With a PhD in Physics from the University of Basel and based in Zurich, he blends rigorous research skills with practical systems engineering. He is an active open-source contributor to high-profile ML and hardware projects—improving performance in XLA, TensorFlow and JAX and extending LiteX and PCIe cores for FPGA platforms. His work sits at the intersection of low-level hardware integration and high-performance software, from cuDNN/CUDA graph optimizations to FPGA memory and PLL tuning. Colleagues rely on him for hard-to-debug performance wins and for translating research ideas into reliable production hardware and firmware.
11 years of coding experience
University of Basel
German, French, Russian, English
Stackoverflow
1reputation
0reached
0answers
0questions
Github Skills (46)
verilog10
c-language10
xilinx10
back-end-development10
python10
gpu-programming10
machine-learning10
c1110
hardware10
ml10
mle10
lit10
c1710
kernel10
lite-server10
Programming languages (9)
Github contributions (5)
openxla/xla
Sep 2022 - Jan 2023
A machine learning compiler for GPUs, CPUs, and ML accelerators
Role in this project:
Back-end Developer & Performance Engineer
Back-end Developer & Performance EngineerContributions:193 reviews, 54 commits, 216 PRs in 4 months
Contributions summary:Ilia contributed to the XLA compiler, focusing on performance optimizations and preventing inefficient computations. Their work involved generalizing logic to avoid redundant calculations in fusions, particularly related to expensive operations like reductions. They implemented and adjusted tests to ensure the correctness of these optimizations. The user also added support for CUDA device information retrieval, including L2 cache size and floating-point operation counts, for performance analysis.
compilermachine-learning
enjoy-digital/litex
Jun 2019 - Jul 2022
Build your hardware, easily!
Role in this project:Embedded Systems Engineer
Embedded Systems EngineerContributions:59 commits, 29 PRs, 12 comments in 3 years 2 months
Contributions summary:Ilia primarily focused on fixing and improving core aspects of the LiteX hardware build system. Their commits addressed issues related to interrupt handling, CSR and AXI bus integration, and support for features like incremental implementation in Xilinx Vivado. They demonstrated proficiency in modifying low-level system integration code, highlighting their understanding of hardware design and build processes. In addition, the user contributed to compilation warning fixes in the simulation modules.
hardwarefpgasystem-on-chip
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