Ivan聽Vignolles
Technical Co-Founder at HardMatrix
Argentina
Summary
馃懁
Senior馃帗
Top SchoolIvan Vignolles is a Digital Design Division Manager and engineer with 10 years' experience designing RTL, DSP/FEC blocks, and system-level software using Verilog, C and Python. He combines hands-on RTL and FPGA implementation experience from research projects and Marvell with current leadership at Stratum Labs, bridging low-level hardware design, compilers, OS development and HPC workflows. His background includes applied research in coherent optical communications and published FPGA convolution work, reflecting a strong mix of theory and practical verification. Based in Argentina and nearly finished with a computer engineering degree from UNC, he brings a pragmatic, research-informed approach to building high-performance digital systems and tooling.
10 years of coding experience
5 years of employment as a software developer
Ingeniero, Computacion, Ingeniero, Computacion at Universidad Nacional de C贸rdoba
English, German, Spanish
Github Skills (37)
modelsim10
simulation10
verilog10
lattice10
xilinx10
hardware10
eda10
vhdl10
altera10
paper10
fpga10
convolution10
vivado10
icestorm10
systemverilog9
Programming languages (7)
Github contributions (5)
ivanvig/2dconv-FPGA
Sep 2017 - Jul 2020
A 2D convolution hardware implementation written in Verilog
Contributions:219 commits, 136 pushes, 6 branches in 2 years 10 months
convolutionhardwareverilogfpga2d-convolution-hardware
ivanvig/MIPS
Mar 2019 - Oct 2020
Contributions:95 commits, 5 pushes, 1 branch in 1 year 7 months
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