Josh Smith is a Principal Firmware Engineer with over 15 years of experience designing hardware, firmware, and software for complex radar systems, currently leading firmware efforts at SRC in Syracuse. A full-stack digital engineer, he specializes in FPGA and programmable-logic RTL design, timing closure, and end-to-end subsystem delivery for products deployed worldwide. He drives engineering quality through coding standards, automated simulation and testing, and mentorship, and has co-authored company-wide VHDL best practices that improved design consistency and reuse. An active contributor to VUnit’s testing framework, he has added and refactored tests and acceptance documentation to strengthen HDL unit testing and build reliability into the toolchain. Known for bridging digital, hardware, and software domains, he also brings hands-on experience with PCIe device drivers, mixed-signal carrier boards, and production test automation.
11 years of coding experience
17 years of employment as a software developer
Bachelor’s Degree Computer Engineering, Bachelor’s Degree Computer Engineering at Clarkson University
VUnit is a unit testing framework for VHDL/SystemVerilog
Role in this project:
QA Engineer / Test Automation Engineer
Contributions:18 commits, 13 PRs, 80 comments in 1 year 2 months
Contributions summary:Josh made several contributions related to improving the VUnit testing framework. They modified existing test cases and added new ones to verify the functionality of the dependency graph and project compilation features. The changes included refactoring and expanding test coverage to include cases with various file extensions and compile order dependencies. The user also updated the acceptance tests and documentation to reflect changes to the testing infrastructure.
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