Martin Velay

Senior Digital Verification Engineer

Zurich, Zurich, Switzerland
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Summary

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Rockstar
🎓
Top School
Martin Velay is a Senior Digital Verification Engineer based in Zurich with a strong RTL design background and an end-to-end track record in digital verification dating back to 2018. He has led multicultural teams and full verification lifecycles—from planning and UVM testbench architecture to coverage-driven regressions and final tapeout—across SoC IP, neuromorphic mixed-signal designs, and high-speed FPGA systems. At Nokia he managed an 11-person global team and modernized UVM environments; at AlpsenTek he built reusable UVM libraries, regression tooling, and VIPs for a neuromorphic vision sensor. Known for meticulous attention to detail, he combines hands-on FPGA/RTL experience with verification leadership and pragmatic automation to accelerate tapeout readiness.
code2 years of coding experience
job3 years of employment as a software developer
bookMaster, Microélectronique et Architecture des Circuits Intégrés, Master, Microélectronique et Architecture des Circuits Intégrés at Université Blaise Pascal (Clermont-II) - Clermont-Ferrand
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Github Skills (6)

trust10
silicon10
security8
system-on-chip3
python3
eda3

Programming languages (2)

SystemVerilogPython

Github contributions (5)

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martin-velay/opentitan

Apr 2024 - Jun 2026

OpenTitan: Open source silicon root of trust
Contributions:414 pushes, 140 branches in 2 years 2 months
martin-velay/mocha

Mar 2026 - Jul 2026

Contributions:26 pushes, 11 branches in 3 months
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