Stephen Ibanez
Network Systems Architect at Intel Corporation
Palo Alto, California, United States
Summary
🤩
Rockstar🎓
Top SchoolStephen Ibanez is a Network Systems Architect based in Palo Alto with nearly a decade of experience designing high-performance, programmable network and NIC/IPU architectures at Intel. He has a strong research-to-product track record—translating academic work from Stanford and Harvey Mudd into practical systems for packet scheduling, transport reliability, and line-rate traffic management. His background includes internships across Google, Xilinx, Oracle, and Raytheon where he built tooling for SLO diagnosis, extended P4 programmability, and optimized low-latency MPI over InfiniBand. Stephen combines deep protocol and hardware knowledge with compiler and control-plane experience, enabling end-to-end programmability in modern networking silicon. A less obvious strength is his history of leading hands-on student projects and building measurement systems, showing he’s equally comfortable mentoring teams and shipping instrumented, production-grade testbeds.
10 years of coding experience
2 years of employment as a software developer
Bachelor of Science (BS) Engineering, Bachelor of Science (BS) Engineering at Harvey Mudd CollegeM.S. & PhD Electrical Engineering, M.S. & PhD Electrical Engineering at Stanford University
Spanish
Github Skills (21)
simulation9
ns39
fpga8
react8
agile8
spring8
risc-v8
simpy8
hardware8
chisel7
rocket-chip7
machine-learning4
intrusion-detection4
web-development3
hugo3
Programming languages (7)
Github contributions (5)
l-nic/firesim
Jun 2020 - Apr 2021
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud (e.g. RISC-V Rocket Chip, BOOM, and more)
Contributions:43 commits, 10 PRs, 38 pushes in 10 months
fpgahardwarerisc-vrocket-chipsimulation
NetFPGA/P4-NetFPGA-public
May 2017 - Feb 2018
P4-NetFPGA wiki
Contributions:69 commits, 10 pushes, 25 comments in 9 months
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