Sujay Pandit
Graduate Research Assistant
West Lafayette, Indiana, United States
Summary
👤
Senior🎓
Top SchoolSujay Pandit is a PhD candidate and graduate research assistant at Purdue University with eight years of hands-on experience in computer architecture, CPU microarchitecture, and ML-driven chip design. He has contributed to RISC-V out-of-order superscalar CPU development at IIT Madras, worked on energy modeling at NVIDIA, and is developing ML frameworks for power estimation and optimal LLM mapping onto accelerators in collaboration with industry partners including Google, Synopsys, UCSD, and DARPA. He also teaches digital systems design automation, bringing practical toolchain experience with Yosys, OpenSta, and Espresso into the classroom. Comfortable bridging RTL implementation, performance optimization, and ML methods, Sujay uniquely blends low-level hardware expertise with data-driven automation for silicon design.
9 years of coding experience
3 years of employment as a software developer
Doctor of Philosophy - PhD, Electrical and Computer Engineering, Doctor of Philosophy - PhD, Electrical and Computer Engineering at Purdue UniversityBachelor's degree, Electronics and Communication Engineering, Bachelor's degree, Electronics and Communication Engineering at Shiv Nadar University
Github Skills (14)
spiking-neural-networks10
python10
mnist10
classification10
sklearn8
verilog8
openocd7
verilator6
cpp6
systemc6
systemverilog6
generalized-linear-models5
neural-network4
risc-v3
Programming languages (4)
Github contributions (5)
sujay-pandit/spiking-neural-networks-mnist-classification
Oct 2019 - Mar 2022
Pure python implementation of unsupervised MNIST classification using Spiking Neural Networks (using STDP)
Contributions:36 commits, 10 pushes, 2 branches in 2 years 5 months
classificationmnistpythonspiking-neural-networks
sujay-pandit/DLX_Verilog
Sep 2017 - Nov 2019
Contributions:15 pushes, 6 branches in 2 years 2 months
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