Summary
Toshihiro Konda is a senior compiler engineer and performance analyst with eight years focused on high-performance compilers and DNN codegen, currently leading a small team at ArchiTek building an aIPE compiler (LLVM/clang/lld) and bespoke RISC-V backends. He has a track record of rapidly implementing complex function units and ISA improvements solo—sometimes delivering primitives in days—and has repeatedly optimized VLIW, long-word codegen, and auto-parallelization for AI chips. Earlier roles span low-level compiler backends (PEZY, DeepInsights), TensorFlow XLA work, and hands-on performance tuning at Fujitsu, giving him deep expertise in ISA design, super-wide SIMD, and applied performance analysis. He describes himself more as a performance analyst than a general programmer, which explains his strength in logical root-cause analysis that ties microarchitecture to real-world performance. Notably, he invented the UXSIMD algorithm and has contributed pragmatic innovations like novel rerolling and parallel pipeline techniques that appear across specialized AI compilers. Based in Chiyoda, Japan, he combines research-grade systems experience with rapid, production-focused implementation.
8 years of coding experience