Xiaodong Cai - Multi-modal Algorithm Enginner at vivo

Xiaodong Cai

Multi-modal Algorithm Enginner at vivo

Minhang District, Shanghai, China

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Summary

🤩

Rockstar

🎓

Top School

Xiaodong Cai is a multi-modal algorithm engineer with over a decade of experience building embedded perception systems and edge AI for consumer and automotive products. He has driven production deployments of IMU, radar, UWB and ToF perception stacks and optimized lightweight CNN and transformer inference to achieve real-time performance and dramatic power reductions. At Intel he led efforts that delivered commercial sensor hubs and millimeter-wave/UWB solutions for major OEMs and improved Whisper transformer MAC utilization to enable real-time transcription. A hands-on systems contributor, he has improved storage and virtualization tooling in high-profile open-source projects like Kata Containers, ISA-L, and SPDK, including low-level QEMU QMP extensions and CRC performance work. Based in Shanghai, he combines mechanical and computer science training with a pragmatic focus on heterogeneous sensor fusion for wearables and low-power devices. Colleagues rely on him for bridging algorithm research with production-grade embedded engineering.

10 years of coding experience

11 years of employment as a software developer

学士机械设计制造及其自动化, 学士机械设计制造及其自动化 at East China University of Science and Technology

硕士计算机科学, 硕士计算机科学 at Zhejiang University

English, Chinese, Japanese

Github Skills (23)

filesystem10

assembly10

qemu10

storage10

c1110

x8610

c1710

go10

performance-optimization10

x86-6410

assembler10

virtualization10

kvm9

container9

linux-kernel9

Programming languages (6)

C++ShellCRustGoPython

Github contributions (5)

spdk/spdk

Nov 2017 - Jan 2023

Storage Performance Development Kit

Role in this project:

Back-end Developer

Contributions:189 commits, 80 comments, 13 issues in 5 years 3 months

Contributions summary:Xiaodong primarily contributed to the storage performance development kit, focusing on the Network Block Device (NBD) subsystem and various other storage-related features. Their contributions included implementing features for the Network Block Device (NBD) subsystem, such as adding a thread to handle interrupt signals, setting an I/O timeout, and enabling flush operations. The user also worked on optimizing code, including addressing memory leaks and removing unnecessary code branches to improve performance. The user also added features for handling NBD related requests.

development-kitvagrantperformancestoragevirtualbox

intel/isa-l

Jul 2016 - Jul 2017

Intelligent Storage Acceleration Library

Role in this project:

Back-end Developer / Performance Engineer

Contributions:12 commits, 1 push, 2 branches in 1 year

Contributions summary:Xiaodong primarily contributed to the performance optimization and implementation of CRC algorithms within the Intelligent Storage Acceleration Library. Their work involved implementing new CRC algorithms for different formats, including ISO and Jones, and optimizing existing implementations with techniques like cache prefetching. The commits also include adding memset calls to the performance test cases. These changes aimed at improving the speed and efficiency of data integrity checks within the library.

compressionaccelerationstorageintelligent

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