Yu Chen is a teacher and researcher in operating systems and compilers at Tsinghua University with 11 years of hands-on experience building low-level systems. He contributes heavily to Rust-based OS projects—most notably the rCore tutorial and rCore kernel—implementing system calls, process management, synchronization primitives, framebuffer-backed GUIs, and educational materials that make kernel concepts accessible. His work spans kernel internals, CI/build automation for microkernels like zCore, and practical teaching labs, blending research, pedagogy, and production-quality engineering. Based in Beijing, he combines deep RISC‑V/Rust expertise with a knack for turning complex OS concepts into testable examples and course content that accelerate learning for students and open-source collaborators.
OS kernel labs based on Rust/C Lang & RISC-V 64/X86-32
Role in this project:
Back-end Developer
Contributions:308 commits, 39 PRs, 306 pushes in 7 years
Contributions summary:Yu contributed to the development of an OS kernel, focusing on core system components. Their work involved implementing process control blocks, memory management, and system calls, demonstrating a focus on low-level system programming. The user's commits also include the integration of threading and synchronization primitives like mutexes and semaphores to improve OS functionality. Furthermore, the user implemented the GUI by adding features to manage desktop events, creating a terminal application with keyboard and mouse input.
Let's write an OS which can run on RISC-V in Rust from scratch!
Role in this project:
Back-end Developer
Contributions:376 commits, 33 PRs, 257 pushes in 1 year 1 month
Contributions summary:Yu primarily contributed to the development of the rcore-tutorial-v3 OS. Their work involved implementing user-space applications, including a race condition adder with argument handling, a semaphore synchronization app, and a GUI application with a snake game. They also fixed typos in the kernel's system call definitions and added support for conditional variables and framebuffer operations, which extended the operating system's functionality.
risc-vrustrcoreoperating-systemk210
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